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CMOS Wireless Transceiver Design 1997 Edition
Contributor(s): Crols, Jan (Author), Steyaert, Michiel (Author)

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ISBN: 0792399609     ISBN-13: 9780792399605
Publisher: Springer
OUR PRICE: $161.49  

Binding Type: Hardcover - See All Available Formats & Editions
Published: June 1997
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Annotation: The revolution in wireless communications sets new requirements for transceivers (transmitter-receivers). Higher operating frequencies, lower power consumption and very high degree of integration, are new specifications which require design approaches quite different from classical RF design techniques. The integratability and power consumption reduction of the digital component will further improve with the continued downscaling of technologies. This is, however, completely different for the analog transceiver front-end, the component which interfaces between the antenna and the digital signal processor. The analog front-end's integratability and power consumption are closely related to the physical limitations of the transceiver topology and not so much to the scaling of the used technology.

CMOS Wireless Transceiver Design is the first book to give a comprehensive treatment of the design of transceivers for use in wireless communication systems. The book overviews existing transceiver design and goes on to introduce new multi-path receiver and transmitter topologies. It also presents a formal methodology for the high-level design of transceiver architectures and fully illustrates its use in the design of a low-IF/direct upconversion GSM transceiver front-end.

CMOS Wireless Transceiver Design further demonstrates its practical nature by containing concluding chapters which study both the integration of RF building blocks in CMOS and the capabilities of deep submicron CMOS used in combination with the new transceiver topologies for the implementation of wireless transceiver front-ends in the 1 to 2 GHz range.

CMOS Wireless Transceiver Design is essential reading for allresearchers and practising engineers working in the design of wireless communication systems requiring highly integrated RF transceivers.

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Additional Information
BISAC Categories:
- Technology & Engineering | Radio
- Computers | Cad-cam
- Technology & Engineering | Electrical
Dewey: 621.384
LCCN: 97019895
Series: The Springer International Engineering and Computer Science
Physical Information: 0.79" H x 7.04" W x 8.96" L (1.08 lbs) 240 pages
Features: Bibliography, Illustrated, Index
 
Descriptions, Reviews, Etc.
Publisher Description:
The world of wireless communications is changing very rapidly since a few years. The introduction of digital data communication in combination with digital signal process- ing has created the foundation for the development of many new wireless applications. High-quality digital wireless networks for voice communication with global and local coverage, like the GSM and DECT system, are only faint and early examples of the wide variety of wireless applications that will become available in the remainder of this decade. The new evolutions in wireless communications set new requirements for the trans- ceivers (transmitter-receivers). Higher operating frequencies, a lower power consump- tion and a very high degree of integration, are new specifications which ask for design approaches quite different from the classical RF design techniques. The integrata- bility and power consumption reduction of the digital part will further improve with the continued downscaling of technologies. This is however completely different for the analog transceiver front-end, the part which performs the interfacing between the antenna and the digital signal processing. The analog front-end's integratability and power consumption are closely related to the physical limitations of the transceiver topology and not so much to the scaling of the used technology. Chapter 2 gives a detailed study of the level of integration in current transceiver realization and analyzes their limitations. In chapter 3 of this book the complex signal technique for the analysis and synthesis of multi-path receiver and transmitter topologies is introduced.
 
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